=
'
+
'
When the compiler fixes up the operands to satisfy the constraints,
it needs to know which operands are inputs to the instruction and
which are outputs from it. `=
' identifies an output; `+
'
identifies an operand that is both input and output; all other operands
are assumed to be input only.
&
'
`&
' applies only to the alternative in which it is written. In
constraints with multiple alternatives, sometimes one alternative
requires `&
' while others do not. See, for example, the
`movdf
' insn of the 68000.
`&
' does not obviate the need to write `=
'.
%
'
(define_insn "addhi3" [(set (match_operand:HI 0 "general_operand" "=m,r") (plus:HI (match_operand:HI 1 "general_operand" "%0,0") (match_operand:HI 2 "general_operand" "di,g")))] ...)
#
'
*
'
*
' has no effect on the meaning of the
constraint as a constraint, and no effect on reloading.
Here is an example: the 68000 has an instruction to sign-extend a
halfword in a data register, and can also sign-extend a value by
copying it into an address register. While either kind of register is
acceptable, the constraints on an address-register destination are
less strict, so it is best if register allocation makes an address
register its goal. Therefore, `*
' is used so that the `d
'
constraint letter (for data register) is ignored when computing
register preferences.
(define_insn "extendhisi2" [(set (match_operand:SI 0 "general_operand" "=*d,a") (sign_extend:SI (match_operand:HI 1 "general_operand" "0,g")))] ...)